A Resolution-Reconfigurable 5-to-10-Bit 0.4-to-1 V Power Scalable SAR ADC for Sensor Applications

A power-scalable SAR ADC for sensor applications is presented. The ADC features a reconfigurable 5-to-10-bit DAC whose power scales exponentially with resolution. At low resolutions where noise and linearity requirements are reduced, supply voltage scaling is leveraged to further reduce the energy-per-conversion. The ADC operates up to 2 MS/s at 1 V and 5 kS/s at 0.4 V, and its power scales linearly with sample rate down to leakage levels of 53 nW at 1 V and 4 nW at 0.4 V. Leakage power-gating during a SLEEP mode in between conversions reduces total power by up to 14% at sample rates below 1 kS/s. Prototyped in a low-power 65 nm CMOS process, the ADC in 10-bit mode achieves an INL and DNL of 0.57 LSB and 0.58 LSB respectively at 0.6 V, and the Nyquist SNDR and SFDR are 55 dB and 69 dB respectively at 0.55 V and 20 kS/s. The ADC achieves an optimal FOM of 22.4 fJ/conversion-step at 0.55 V in 10-bit mode. The combined techniques of DAC resolution and voltage scaling maximize efficiency at low resolutions, resulting in an FOM that increases by only 7x over the 5-bit scaling range, improving upon a 32x degradation that would otherwise arise from truncation of bits from an ADC of fixed resolution and voltage.United States. Defense Advanced Research Projects AgencyNatural Sciences and Engineering Research Council of Canad

A highly digital, reconfigurable and voltage scalable SAR ADC

Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2009.Cataloged from PDF version of thesis.Includes bibliographical references (p. 109-112).Micropower sensor networks have a broad range of applications which include military surveillance, environmental monitoring, chemical detection and more recently, medical monitoring systems. Each node of the sensor network requires energy efficient circuits powered off small batteries or harvested energy. In such systems, a single reconfigurable analog-to-digital converter (ADC) is needed to digitize a wide range of signals with varying bandwidth and resolution requirements. This thesis describes the design of an ADC whose power scales exponentially with resolution and linearly with frequency to maximize the system lifetime. The proposed ADC has reconfigurable resolution from 5 to 10-bits and a scalable sample rate from 0 to 1-MS/s. The successive approximation register (SAR) architecture was chosen for its highly digital nature which enables low voltage operation. The supply voltage can be scaled from 1V down to 0.4V such that the ADC maintains a constant energy efficiency across all modes of operation when normalized with respect to sample rate and resolution. A capacitive digital-to -analog converter (DAC) in a split capacitor topology with a sub-DAC is used to minimize the DAC power and area. Top plate switches are used to decouple the MSB capacitors as resolution is scaled to avoid parasitic loading of the DAC. The DAC capacitors are laid out in a common-centroid configuration with edge effects minimized at each resolution mode to improve matching. A fully dynamic latched comparator is used to avoid static bias currents.(cont.) Power gating of the digital logic is used to reduce leakage power at low sample rates. Reconfigurability between single-ended or differential modes enables a power versus performance trade-off. Lastly, programmable sampling duration and internal bootstrapping is used to maintain sampling linearity at low voltages. The ADC has been submitted for fabrication in a low power 65nm digital CMOS process and simulation results are presented.by Marcus Yip.S.M

Ultra-low-power circuits and systems for wearable and implantable medical devices

Thesis (Ph. D.)--Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2013.Cataloged from PDF version of thesis.Includes bibliographical references (pages 219-231).Advances in circuits, sensors, and energy storage elements have opened up many new possibilities in the health industry. In the area of wearable devices, the miniaturization of electronics has spurred the rapid development of wearable vital signs, activity, and fitness monitors. Maximizing the time between battery recharge places stringent requirements on power consumption by the device. For implantable devices, the situation is exacerbated by the fact that energy storage capacity is limited by volume constraints, and frequent battery replacement via surgery is undesirable. In this case, the design of energy-efficient circuits and systems becomes even more crucial. This thesis explores the design of energy-efficient circuits and systems for two medical applications. The first half of the thesis focuses on the design and implementation of an ultra-low-power, mixed-signal front-end for a wearable ECG monitor in a 0.18pm CMOS process. A mixed-signal architecture together with analog circuit optimizations enable ultra-low-voltage operation at 0.6V which provides power savings through voltage scaling, and ensures compatibility with state-of-the-art DSPs. The fully-integrated front-end consumes just 2.9[mu]W, which is two orders of magnitude lower than commercially available parts. The second half of this thesis focuses on ultra-low-power system design and energy-efficient neural stimulation for a proof-of-concept fully-implantable cochlear implant. First, implantable acoustic sensing is demonstrated by sensing the motion of a human cadaveric middle ear with a piezoelectric sensor. Second, alternate energy-efficient electrical stimulation waveforms are investigated to reduce neural stimulation power when compared to the conventional rectangular waveform. The energy-optimal waveform is analyzed using a computational nerve fiber model, and validated with in-vivo ECAP recordings in the auditory nerve of two cats and with psychophysical tests in two human cochlear implant users. Preliminary human subject testing shows that charge and energy savings of 20-30% and 15-35% respectively are possible with alternative waveforms. A system-on-chip comprising the sensor interface, reconfigurable sound processor, and arbitrary-waveform neural stimulator is implemented in a 0.18[mu]m high-voltage CMOS process to demonstrate the feasibility of this system. The sensor interface and sound processor consume just 12[mu]W of power, representing just 2% of the overall system power which is dominated by stimulation. As a result, the energy savings from using alternative stimulation waveforms transfer directly to the system.by Marcus Yip.Ph.D

A 0.6V 2.9µW mixed-signal front-end for ECG monitoring

This paper presents a mixed-signal ECG front-end that uses aggressive voltage scaling to maximize power-efficiency and facilitate integration with low-voltage DSPs. 50/60Hz interference is canceled using mixed-signal feedback, enabling ultra-low-voltage operation by reducing dynamic range requirements. Analog circuits are optimized for ultra-low-voltage, and a SAR ADC with a dual-DAC architecture eliminates the need for a power-hungry ADC buffer. Oversampling and ΔΣ-modulation leveraging near-V[subscript T] digital processing are used to achieve ultra-low-power operation without sacrificing noise performance and dynamic range. The fully-integrated front-end is implemented in a 0.18μm CMOS process and consumes 2.9μW from 0.6V.Texas Instruments IncorporatedNatural Sciences and Engineering Research Council of Canada (Fellowship

Averaging approach to phase coherence of uncoupled limit-cycle oscillators receiving common random impulses

Populations of uncoupled limit-cycle oscillators receiving common random impulses show various types of phase-coherent states, which are characterized by the distribution of phase differences between pairs of oscillators. We develop a theory to predict the stationary distribution of pairwise phase difference from the phase response curve, which quantitatively encapsulates the oscillator dynamics, via averaging of the Frobenius-Perron equation describing the impulse-driven oscillators. The validity of our theory is confirmed by direct numerical simulations using the FitzHugh-Nagumo neural oscillator receiving common Poisson impulses as an example

Design of Low-Voltage Digital Building Blocks and ADCs for Energy-Efficient Systems

Increasing number of energy-limited applications continue to drive the demand for designing systems with high energy efficiency. This tutorial covers the main building blocks of a system implementation including digital logic, embedded memories, and analog-to-digital converters and describes the challenges and solutions to designing these blocks for low-voltage operation

Energy-efficient waveform for electrical stimulation of the cochlear nerve

The cochlear implant (CI) is the most successful neural prosthesis, restoring the sensation of sound in people with severe-to-profound hearing loss by electrically stimulating the cochlear nerve. Existing CIs have an external, visible unit, and an internal, surgically-placed unit. There are significant challenges associated with the external unit, as it has limited utility and CI users often report a social stigma associated with prosthesis visibility. A fully-implantable CI (FICI) would address these issues. However, the volume constraint imposed on the FICI requires less power consumption compared to today’s CI. Because neural stimulation by CI electrodes accounts for up to 90% of power consumption, reduction in stimulation power will result directly in CI power savings. To determine an energy-efficient waveform for cochlear nerve stimulation, we used a genetic algorithm approach, incorporating a computational model of a single mammalian myelinated cochlear nerve fiber coupled to a stimulator-electrode-tissue interface. The algorithm’s prediction was tested in vivo in human CI subjects. We find that implementation of a non-rectangular biphasic neural stimulation waveform may result in up to 25% charge savings and energy savings within the comfortable range of hearing for CI users. The alternative waveform may enable future development of a FICI

Deciphering the genetic basis for polyketide variation among mycobacteria producing mycolactones.

BACKGROUND: Mycolactones are immunosuppressive and cytotoxic polyketides, comprising five naturally occurring structural variants (named A/B, C, D, E and F), produced by different species of very closely related mycobacteria including the human pathogen, Mycobacterium ulcerans. In M. ulcerans strain Agy99, mycolactone A/B is produced by three highly homologous type I polyketide megasynthases (PKS), whose genes (mlsA1: 51 kb, mlsA2: 7.2 kb and mlsB: 42 kb) are found on a 174 kb plasmid, known as pMUM001. RESULTS: We report here comparative genomic analysis of pMUM001, the complete DNA sequence of a 190 kb megaplasmid (pMUM002) from Mycobacterium liflandii 128FXT and partial sequence of two additional pMUM replicons, combined with liquid chromatography-tandem mass spectrometric (LC-MS/MS) analysis. These data reveal how PKS module and domain differences affecting MlsB correlate with the production of mycolactones E and F. For mycolactone E these differences from MlsB in M. ulcerans Agy99 include replacement of the AT domain of the loading module (acetate to propionate) and the absence of an entire extension module. For mycolactone F there is also a reduction of one extension module but also a swap of ketoreductase domains that explains the characteristic stereochemistry of the two terminal side-chain hydroxyls, an arrangement unique to mycolactone F CONCLUSION: The mycolactone PKS locus on pMUM002 revealed the same large, three-gene structure and extraordinary pattern of near-identical PKS domain sequence repetition as observed in pMUM001 with greater than 98.5% nucleotide identity among domains of the same function. Intra- and inter-strain comparisons suggest that the extreme sequence homogeneity seen among the mls PKS genes is caused by frequent recombination-mediated domain replacement. This work has shed light on the evolution of mycolactone biosynthesis among an unusual group of mycobacteria and highlights the potential of the mls locus to become a toolbox for combinatorial PKS biochemistry.RIGHTS : This article is licensed under the BioMed Central licence at http://www.biomedcentral.com/about/license which is similar to the 'Creative Commons Attribution Licence'. In brief you may : copy, distribute, and display the work; make derivative works; or make commercial use of the work - under the following conditions: the original author must be given credit; for any reuse or distribution, it must be made clear to others what the license terms of this work are

Perfusion and Metabolic Neuromonitoring during Ventricular Taps in Infants with Post-Hemorrhagic Ventricular Dilatation.

Post-hemorrhagic ventricular dilatation (PHVD) is characterized by a build-up of cerebral spinal fluid (CSF) in the ventricles, which increases intracranial pressure and compresses brain tissue. Clinical interventions (i.e., ventricular taps, VT) work to mitigate these complications through CSF drainage; however, the timing of these procedures remains imprecise. This study presents Neonatal NeuroMonitor (NNeMo), a portable optical device that combines broadband near-infrared spectroscopy (B-NIRS) and diffuse correlation spectroscopy (DCS) to provide simultaneous assessments of cerebral blood flow (CBF), tissue saturation (

Associations with photoreceptor thickness measures in the UK Biobank.

Spectral-domain OCT (SD-OCT) provides high resolution images enabling identification of individual retinal layers. We included 32,923 participants aged 40-69 years old from UK Biobank. Questionnaires, physical examination, and eye examination including SD-OCT imaging were performed. SD OCT measured photoreceptor layer thickness includes photoreceptor layer thickness: inner nuclear layer-retinal pigment epithelium (INL-RPE) and the specific sublayers of the photoreceptor: inner nuclear layer-external limiting membrane (INL-ELM); external limiting membrane-inner segment outer segment (ELM-ISOS); and inner segment outer segment-retinal pigment epithelium (ISOS-RPE). In multivariate regression models, the total average INL-RPE was observed to be thinner in older aged, females, Black ethnicity, smokers, participants with higher systolic blood pressure, more negative refractive error, lower IOPcc and lower corneal hysteresis. The overall INL-ELM, ELM-ISOS and ISOS-RPE thickness was significantly associated with sex and race. Total average of INL-ELM thickness was additionally associated with age and refractive error, while ELM-ISOS was additionally associated with age, smoking status, SBP and refractive error; and ISOS-RPE was additionally associated with smoking status, IOPcc and corneal hysteresis. Hence, we found novel associations of ethnicity, smoking, systolic blood pressure, refraction, IOPcc and corneal hysteresis with photoreceptor thickness